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Understanding PCIe over Optics

This article will delve into the realm of PCIe over Optics, a promising solution for escalating bandwidth demands in data centers.

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USB

Enabling the USB4 v2 80Gbps Ecosystem

This article explores the challenges with transitioning from PAM-2 to PAM-3 encoding and the need for silicon characterization of USB4 v2 PHY IP.

Learn how

Generative AI for the Edge

Learn how Synopsys NPX6 NPU IP, designed for a range of deep learning tasks, can run generative AI algorithms while addressing the power, performance and cost requirements of edge device applications.

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SLM

Monitor, Test, and Repair Chips with Synopsys SLM IP

This article outlines some of the requirements for a complete MTR IP solution for today’s large and complex semiconductor devices.

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Synopsys 3DIO Solution for Multi-Die Integration (2.5D/3D)

Learn how Synopsys 3DIO solution addresses customer heterogeneous packaging needs based on flexibility, scalability and performance.

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Enabling the Integration of ADAS and IVI SoCs with IP

This article highlights how integrated ADAS/IVI applications are enabled by centralized compute SoCs utilizing automotive-grade IP.

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  • Enabling SoC Security and Reliability for HPC, AI & IoT with NVM OTP IP in TSMC N5
  • CMOS Circuit Techniques for Wireline Transmitters Part I
  • ARC Processor Implementations with AI-enabled Fusion QuickStart Kits
  • Scaling Data Center Infrastructure for the Terabit Era
  • Improving Quality, FuSa, Reliability, and Security in Automotive Semiconductors

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